Dr Joshua Chao
Deputy VP of Business Development
ATX Group
26+ years in IC semiconductor packaging for microelectronics
OSAT (ASE, Amkor), IDM (Micron, AMD-JV), Huawei
Sr. Director New Technology R&D, Advanced Packaging Technology Roadmap & Marketing, IP Patent, Costing model…
NPI Director mobility Memory Package, HPC Flip-Chip BGA
R&D Manager SA, BGA Substrate, Bumping WLCSP Design, TP
Project Lead Thermal Enhanced Package Development & NPI
Sr. Process Engineer Molding & CAE Optimization
TPCA IMPACT Conference & Semi Taiwan Advanced Package Conference
Heterogeneous Integration
16 May 2024 1120 - 1140
Slowing Moore’s law scaling after N14 had accelerated various advanced package developments: 2.5D IC was successfully demonstrated by AMD/UMC/Hynix/ASE in 2015, 5 years later, tsmc published leading edge 3D Fabric design paradigm with foundry-level heterogeneous integrations in CoWoS, InFO, 3D SoIC, EPIC platforms to propel higher computing performance & networking efficiency for Cloud Server AI/ML realizations.
To fulfill wider market demands on high performance intelligent appliances (ex: AI-PC, AI-phone, autonomous Car, smart home…etc.) as total solutions. Product design will adopt more package-level value-adds from “multi-functional chip-let integration with miniaturization” & “heterogeneous building-blocks (ex: µC/processor, memory, analog/RF, MEMS sensor, power discrete, and passives)” into all applications of Consumer, Communication, Industrial and Automotive…
Augmented intelligence in future society requires sustainable innovations for power-efficient computing performance with contextual awareness devices, ATX is ready and devoted to collaborate with customers & industrial partners to embrace great AIoT opportunities at post Moore’s era.
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*Please note that the event schedule is subject to change without prior notice.
The event is organised by Technology Development Centre at ITE College Central
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